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general description the max1638 is an ultra-high-performance, step-downdc-dc controller for cpu power in high-end computer systems. designed for demanding applications in which output voltage precision and good transient response are critical for proper operation, it delivers over 35a from 1.3v to 3.5v with ?% total accuracy from a +5v ?0% supply. excellent dynamic response corrects output transients caused by the latest dynamically clocked cpus. this controller achieves over 90% efficiency by using synchro- nous rectification. flying-capacitor bootstrap circuitry drives inexpensive, external n-channel mosfets. the switching frequency is pin-selectable for 300khz, 600khz, or 1mhz. high switching frequencies allow the use of a small surface-mount inductor and decrease out- put filter capacitor requirements, reducing board area and system cost. the max1638 is available in 24-pin ssop and qsop (future package) packages, and offers additional fea- tures such as a digitally programmable output; adjustable transient response; and selectable 0.5%, 1%, or 2% ac load regulation. fast recovery from load tran- sients is ensured by a glitchcatcher current-boost cir- cuit that eliminates delays caused by the buck inductor. output overvoltage protection is enforced by a crowbar circuit that turns on the low-side mosfet with 100% duty factor when the output is 200mv above the normal regulation point. other features include internal digital soft-start, a power-good output, and a 3.5v ?% refer- ence output. ________________________applications pentium pro, pentium ii, powerpc, alpha,and k6 systems workstations desktop computers lan servers gtl bus termination ____________________________features ? better than 1% output accuracy over line and load ? greater than 90% efficiency using n-channel mosfets ? pin-selected high switching frequency (300khz, 600khz, or 1mhz) ? over 35a output current ? digitally programmable output from 1.3v to 3.5v ? current-mode control for fast transient response and cycle-by-cycle current-limit protection ? short-circuit protection with foldback current limiting ? glitch-catcher circuit for fast load-transient response ? crowbar overvoltage protection ? power-good (pwrok) output ? digital soft-start ? high-current (2a) drive outputs ? complies with intel vrm 8.2 specification max1638 high-speed step-down controller with synchronous rectification for cpu power ___________________________________________________ _____________ maxim integrated products 1 19-1313; rev 1; 8/05 part max1638eag max1638eag+ -40? to +85? -40? to +85? temp range pin-package 24 ssop24 qsop ordering information typical operating circuit pin configuration appears at end of data sheet. pentium pro and pentium ii are trademarks of intel corp. powerpc is a trademark of ibm corp. alpha is a trademark of digital equipment corp. k6 is a trademark of advanced micro devices. glitchcatcher is a trademark of maxim integrated products. v cc agndref lg freq cc1 cc2 dl pwrok d0 lx bst dh pgnd to v dd csh output 1.3v to 4.5v input +5v v dd csl fb max1638 d1 d2 d3 d4 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available + denotes lead-free package. downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power 2 __________________________________________________ _____________________________________ absolute maximum ratings electrical characteristics (v dd = v cc = d4 = +5v, pgnd = agnd = d0?3 = 0v, freq = ref, t a = 0c to +85c , unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd , v cc , pwrok to agnd ......................................-0.3v to 6v pgnd to agnd ..................................................................?.3v csh, csl to agnd ....................................-0.3v to (v cc + 0.3v) ndrv, pdrv, dl to pgnd.........................-0.3v to (v dd + 0.3v) ref, cc1, cc2, lg, d0?4, freq, fb to agnd.............................................-0.3v to (v cc + 0.3v) bst to pgnd ............................................................-0.3v to 12v bst to lx ....................................................................-0.3v to 6v dh to lx.............................................(lx - 0.3v) to (bst + 0.3v) continuous power dissipation (t a = +70?) qsop (derate 8.70mw/? above +70?) .....................696mw qsop jc ..................................................................40?/w ssop (derate 8.00mw/? above +70?) .....................640mw ssop jc ..................................................................45?/w operating temperature range ...........................-40? to +85? storage temperature range .............................-65? to +160? lead temperature (soldering, 10s) .................................+300? freq = agnd freq = ref v cc = v dd freq = v cc pwrok = 5.5v over line and load (note 1) i sink = 2ma, v cc = 4.5v falling fb, 1% hysteresis with respect to v ref rising fb, 1% hysteresis with respect to v ref csh - csl = 0mv to 80mv 0? < i ref < 100? no load v cc = v dd = 5.5v, fb forced 200mv above regulation point, operating or standby mode v cc rising edge, 1% hysteresis v ref = 0v rising edge, 1% hysteresis conditions khz 255 300 345 switching frequency 540 600 660 850 1000 1150 ? 1 pwrok output current high v 0.4 pwrok output voltage low % 6.5 8 9.5 pwrok trip level -7.5 -6 -4.5 % 2 ac load regulation (note 2) 1 0.5 ma 0.5 4.0 reference short-circuit current v 2.7 3.0 reference undervoltage lockout v 4.5 5.5 input voltage range % ?.5 ? output voltage (fb) accuracy mv 10 reference load regulation v 3.465 3.5 3.535 reference voltage ma 0.1 v dd supply current v 4.0 4.2 input undervoltage lockout units min typ max parameter csh - csl = 0mv to 80mv % 0.2 dc load regulation (note 2) 0.1 0.05 t a = +25? to +85? t a = 0? to +85? lg = gnd lg = ref lg = v cc lg = gnd lg = ref lg = v cc 2.5 fb overdrive = 200mv 5 fb overdrive = 0v operatingmode v cc = v dd = 5.5v ma 3.6 10 v cc supply current v ref = 0v shutdownmode 0.3 dac code = 11111 downloaded from: http:///
electrical characteristics (continued) (v dd = v cc = d4 = +5v, pgnd = agnd = d0?3 = 0v, freq = ref, t a = 0c to +85c , unless otherwise noted.) max1638 _______________________________________________________________________________________ 3 dh = dl = 2.5v v dd = 4.5v bst - lx = 4.5v gnd (low) 100mv overdrive freq = v cc with respect to v ref , fb going low minimum d0?4 = 0v d0?4, v cc = 5.5v ref (mid) csh = csl = 1.3v, d0?3 = 5v, d4 = 0v d0?4, v cc = 4.5v conditions -2.75 -2 -1.25 v cc (high) ns 03 0 dh, dl dead time a 2 dh, dl source/sink current 0.7 2 maximum dh on-resistance 0.7 2 % -3 -1 ? 100 cc2 source/sink current 4v cc v 2.4 3.0 mmho 1 k 10 cc1 output resistance ? ?.1 3.3 3.7 0.2 % 85 90 maximum duty cycle lg, freq input voltage ? 50 csh, csl input current ? 4 lg, freq input current ? 251 0 d0?4 source current v 2.0 logic input voltage high v cc - 0.1 v 0.8 logic input voltage low units min typ max parameter fb input current cc2 clamp voltage cc2 transconductance pdrv trip level pdrv, ndrv response time fb overdrive = 5% ns 75 pdrv, ndrv on-resistance v dd = 4.5v 25 pdrv, ndrv source/sink current pdrv = ndrv = 2.5v a 0.5 pdrv, ndrv minimum on-time ns 100 fb = 3.5v 85 100 115 soft-start time to full current limit 1 / f osc 1536 bst leakage current bst = 12v, lx = 7v, ref = gnd ? 50 v high-speed step-down controller with synchronous rectification for cpu power dl on-resistance ndrv trip level with respect to v ref , fb going high 1.25 2 2.75 % 13 t a = +25? t a = 0? to +85? t a = +25? t a = 0? to +85? current-limit trip voltage fb = 0v (foldback) mv 15 38 70 downloaded from: http:///
v max1638 high-speed step-down controller with synchronous rectification for cpu power 4 __________________________________________________ _____________________________________ freq = ref freq = v cc falling fb, 1% hysteresis with respect to v ref rising fb, 1% hysteresis with respect to v ref freq = agnd over line and load (note 1) v cc = v dd conditions 510 600 690 800 1000 1200 switching frequency 681 0 khz 240 300 360 % -8 -6 -4 pwrok trip level % ?.5 output voltage (fb) accuracy v 4.5 5.5 input voltage range units min typ max parameter bst - lx = 4.5v freq = v cc v dd = 4.5v 0.7 2 % 84 90 0.7 2 maximum duty cycle dl on-resistance dh on-resistance fb = 3.5v current-limit trip voltage mv 70 100 130 electrical characteristics (v dd = v cc = d4 = +5v, pgnd = agnd = d0?3= 0v, freq = ref, t a = -40c to +85c , unless otherwise noted.) (note 3) note 1: fb accuracy is 100% tested at fb = 3.5v (code 10000) with v cc = v dd = 4.5v to 5.5v and csh - csl = 0mv to 80mv. the other dac codes are tested with v cc = v dd = 5v and csh - csl = 0. note 2: ac load regulation sets the ac loop gain, to make tradeoffs between output filter capacitor size and transient response,and has only a slight effect on dc accuracy or dc load-regulation error. note 3: specifications from 0? to -40? are guaranteed by design, not production tested. no load v 3.448 3.5 3.553 reference voltage v cc rising edge, 1% hysteresis v 3.9 4.3 input undervoltage lockout 0.4 operating mode 3 v cc supply current v cc = v dd = 5.5v, fb forced 200mv above regulation point, operating or shutdown mode ma 0.2 v cc = v dd = 5.5v, fb overdrive =200mv v dd supply current ma 12 shutdownmode v ref = 0v dac code = 11111 downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power _______________________________________________________________________________________ 5 foldback current limit max1638-04 v o = 2.0v nominal a: v out = 0.5v/div b: inductor current, 5a/div a b 10 s/div startup waveforms max1638-05 a: v out = 0.5v/div b: inductor current, 5a/div a b 400 s/div 1 s/div switching waveforms c 0 max1638-06 v in = 5v, v out = 2.5v, load = 5a a: lx, 5v/div c: inductor current, b: v out , 20mv/div, ac coupled 5a/div b a load-transient response without glitchcatcher (c out = 880 f) max1638-01 v in = 5v, v out = 2.0v, load = 14a, 3a/ s a: v out , 50mv/div, ac coupled b: inductor current, 10a/div ab 10 s/div load-transient response without glitchcatcher (c out = 440 f) max1638-02 v in = 5v, v out = 2.0v, load = 14a, 3a/ s a: v out , 100mv/div, ac coupled b: inductor current, 10a/div ab 10 s/div load-transient response with glitchcatcher max1638-03 c out = 440 f, v in = 5v, v out = 2.0v, load = 14a, 30a/ s a: v out , 100mv/div, c: ndrv, 5v/div ac coupled d: inductor current, b: pdrv, 5v/div 10a/div a d b c 10 s/div __________________________________________typical operating characteristics (t a = +25?, using the max1638 evaluation kit, unless otherwise noted.) 100 90 30 0.1 10 100 efficiency vs. output current 5040 8070 60 max1638-07 output current (a) efficiency (%) 1 v out = 2.0v v out = 1.3v v out = 3.5v 5.0941.094 0.001 0.1 1 0.01 10 reference voltage vs. output current 1.594 2.094 max1638-08 output current (ma) reference voltage (v) 2.594 3.5943.094 4.094 4.594 sourcing current sinking current 50 55 0 maximum duty cycle vs. switching frequency 6560 70 max1638-09 switching frequency (khz) maximum duty cycle (%) 85 9590 75 80 200 800 1000 1200 100 600 400 downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power 6 __________________________________________________ _____________________________________ pin high-side main mosfet switch gate-drive output. dh is a floating driver output that swings from lxto bst, riding on the lx switching-node voltage. see the section bst high-side gate-driver supply and mosfet drivers . dh 24 switching node. connect lx to the high-side mosfet source and inductor. lx 23 power ground pgnd 22 dl low-side synchronous rectifier gate-drive output. dl swings between pgnd and v dd . see the section bst high-side gate-driver supply and mosfet drivers . 21 v dd 5v power input for mosfet drivers. bypass v dd to pgnd within 0.2 in. (5mm) of the v dd pin using a 0.1? capacitor and 4.7? capacitor connected in parallel. 20 pdrv glitchcatcher p-channel mosfet driver output. pdrv swings between v dd and pgnd. 19 ndrv glitchcatcher n-channel mosfet driver output. ndrv swings between v dd and pgnd. 18 d4, d3 digital inputs for programming the output voltage 16, 17 freq frequency-select input. freq = v cc : 1mhz freq = ref: 600khzfreq = agnd: 300khz 15 cc2 slow-loop compensation capacitor input. connect a ceramic capacitor from cc2 to agnd. see thesection compensating the feedback loop. 14 bst boost-capacitor bypass for high-side mosfet gate drive. connect a 0.1? capacitor and low-leak-age schottky diode as a bootstrapped charge-pump circuit to derive a 5v gate drive from v dd for dh. 1 name function ______________________________________________________________pin description cc1 fast-loop compensation capacitor input. connect a ceramic capacitor and resistor in series fromcc1 to agnd. see the section compensating the feedback loop . 13 fb voltage-feedback input. connect fb to the cpu? remote voltage-sense point. the voltage at this inputis regulated to a value determined by d0?4. 12 pwrok open-drain logic output. pwrok is high when the voltage on fb is within +8% and -6% of its set-point. 2 csl current-sense amplifier? inverting input. place the current-sense resistor very close to the controller ic,and use a kelvin connection. 3 csh current-sense amplifier? noninverting input 4 d2, d1, d0 digital inputs for programming the output voltage. d0?4 are logic inputs that set the output to a volt-age between 1.3v and 3.5v (table 2). d0?4 are internally pulled up to v cc with 5? current sources. 5, 6, 7 lg loop gain-control input. lg is a three-level input that is used to trade off loop gain vs. ac load-regula-tion and load-transient response. connect lg to v cc , ref, or agnd for 2%, 1%, or 0.5% ac load-reg- ulation errors, respectively. 8 v cc analog supply input, 5v. use an rc filter network, as shown in figure 1. 9 ref reference output, 3.5v. bypass ref to agnd with 0.1? (min). sources up to 100? for externalloads. force ref below 2v to turn off the controller. 10 agnd analog ground 11 downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power ___________________________________________________ ____________________________________ 7 figure 1. standard application circuit _____standard application circuits the predesigned max1638 circuit shown in figure 1meets a wide range of applications with output currents up to 19a and higher. use table 1 to select compo- nents appropriate for the desired output current range, and adapt the evaluation kit pc board layout as neces- sary. this circuit represent a good set of trade-offs between cost, size, and efficiency while staying within the worst-case specification limits for stress-related parameters, such as capacitor ripple current. the max1638 circuit was designed for the specified frequency. do not change the switching frequency without first recalculating component values?articu- larly the inductance, output filter capacitance, and rc1 resistance values. table 2 lists the voltage adjustment dac codes. _______________detailed description the max1638 is a bicmos power-supply controllerdesigned for use in switch-mode, step-down (buck) topology dc-dc converters. synchronous rectification provides high efficiency. it is intended to provide the high precision, low noise, excellent transient response, and high efficiency required in today? most demand- ing applications. n1 n2 d1 (optional) r3 (optional) r4 (optional) v cc v dd pwrok bst dh lx dl pgnd csh fb pdrv ndrv agnd cc1 cc2 cc1 1000pf cc2 0.056 f ref c4, 1.0 f ceramic rc1 1k to agnd r6 100k c5 0.1 f c6 10 f r5 10 to v dd freq lg d0d1 d2 d3 d4 c7 0.1 f d2cmpsh-3 c30.1 f l1 r1 v in = 5v c1 c2 localbypassing max1638 p1 c81 f r2 v out = 1.3v to 3.5v n3 load csl downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power 8 __________________________________________________ _____________________________________ +- +- ref ref4 ref3 ref2 ref fb d0?4 pwrok pdrv ndrv cc2 cc1 ref1 5 10k 40k window control and drive logic oscillator slope compensation agnd v cc freq ref4 ref1 ref ref3 ref2 cslcsh lg bst dh lx v dd dl reset qq set pgnd max1638 n g m figure 2. simplified block diagram downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power ___________________________________________________ ____________________________________ 9 pwm controller block and integrator the heart of the current-mode pwm controller is a multi-input open-loop comparator that sums three sig- nals (figure 2): the buffered feedback signal, the cur- rent-sense signal, and the slope-compensation ramp. this direct-summing configuration approaches ideal cycle-by-cycle control over the output voltage. the out- put voltage error signal is generated by an error ampli- fier that compares the amplified feedback voltage to an internal reference. each pulse from the oscillator sets the main pwm latch that turns on the high-side switch for a period deter- mined by the duty factor (approximately v out / v in ). the current-mode feedback system regulates the peakinductor current as a function of the output voltage error signal. since average inductor current is nearly the same as peak current (assuming the inductor value is set relatively high to minimize ripple current), the cir- cuit acts as a switch-mode transconductance amplifier. it pushes the second output lc filter pole, normallyfound in a duty-factor-controlled (voltage-mode) pwm, to a higher frequency. to preserve inner-loop stability and eliminate regenerative inductor current staircasing, a slope-compensation ramp is summed into the main pwm comparator. under fault conditions where the inductor current exceeds the maximum current-limit threshold, the high-side latch resets, and the high-side switch turns off. internal reference the internal 3.5v reference (ref) is accurate to ?% from 0? to +85?, making ref useful as a system ref- erence. bypass ref to agnd with a 0.1? (min) ceramic capacitor. a larger value (such as 2.2?) is recommended for high-current applications. load reg- ulation is 10mv for loads up to 100?. reference undervoltage lockout is between 2.7v and 3v. short- circuit current is less than 4ma. table 1. component list for standard applications c2 (x4) sanyo os-con 4sp220m (220f) central semiconductor cmpsh-3 coiltronics up4-r47 (0.47h, 19a, smd) or panasonic etqp1f0r7h (0.70?, 19a, 1.6m , smd) int? rectifier irf7307 (0.09 /0.05 ) (x2) dale wsl-2512-r009-f (10m) (x3) sanyo os-con 10sa220m (220f) int? rectifier irf7307 (0.09 /0.05 ) (x6) sanyo os-con 4sp220m (220?) central semiconductor cmpsh-3 panasonic etqp2f1r0s (0.70?, 23a, 0.94m , smd) load requirement (x2) dale wsr-20.007 ?% (7m ) (x4) sanyo/os-con 10sa220m (220?) d1 (optional) nihon nsq03a02 schottky diode or motorola mbrs340 nihon nsq03a02 schottky diode or motorola mbrs340 fairchild fdb7030l (10m) or int? rectifier irl3803s (9m ) (x2) fairchild fdb7030l (10m ) or (x2) int? rectifier irl3803s (9m ) n1 fairchild fdb7030l (10m) or int? rectifier irl3803s (9m ) d2 (x2) fairchild fdb7030l (10m ) or (x2) int? rectifier irl3803s (9m ) n2 2.0v, 14a 2.0v, 19a (x7) sanyo os-con 4sp220m (220?) central semiconductor cmpsh-3 panasonic etqp2f1r0s (0.70?, 23a, 0.94m , smd) int? rectifier irf7105 (0.4 /0.16 ) (x2) dale wsr-20.007 ?% (7m ) dale wsl-2512-r120-j (120m ) r2 (optional) l1 (x4) sanyo/os-con 10sa220m (220?) p1/n3 (optional) nihon nsq03a02 schottky diode or motorola mbrs340 (x2) fairchild fdb7030l (10m ) or (x2) int? rectifier irl3803s (9m ) (x2) fairchild fdb7030l (10m ) or (x2) int? rectifier irl3803s (9m ) 1.3v, 19a r1 component c1 note: parts used in evaluation board are shown in bold. downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power 10 _________________________________________________ _____________________________________ synchronous-rectifier driver synchronous rectification reduces conduction losses inthe rectifier by shunting the normal schottky diode or mosfet body diode with a low-on-resistance mosfet switch. the synchronous rectifier also ensures proper start-up by precharging the boost-charge pump used for the high-side switch gate-drive circuit. thus, if you must omit the synchronous power mosfet for cost or other reasons, replace it with a small-signal mosfet, such as a 2n7002. the dl drive waveform is simply the complement of the dh high-side drive waveform (with typical con- trolled dead time of 30ns to prevent cross-conduction or shoot-through). the dl output? on-resistance is 0.7 (typ) and 2 (max). bst high-side gate-driver supply and mosfet drivers gate-drive voltage for the high-side n-channel switchis generated using a flying-capacitor boost circuit (figure 3). the capacitor is alternately charged from the +5v supply and placed in parallel with the high- side mosfet? gate and source terminals. gate-drive resistors (r3 and r4) can often be useful to reduce jitter in the switching waveforms by slowing down the fast-slewing lx node and reducing ground bounce at the controller ic. however, switching loss may increase. low-value resistors from around 1 to 5 are sufficient for many applications. glitchcatcher current-boost driver drivers for an optional glitchcatcher current-boost cir-cuit are included in the max1638 to improve transient response in applications where several amperes of load current are required in a matter of a few tens of nanoseconds. the glitchcatcher can be used to offset the fast drop in output voltage due to the esr of the output capacitance. the current-boost circuit improves transient response by providing a direct path from the input to the output that circumvents the buck inductor? filtering action. when the output drops out of regulation by more than 2%, the p-channel or n-channel switch turns on and injects current directly into the output from v in or ground, forcing the output back into regulation. the driver? response time is typically 75ns, and mini-mum on-time is typically 100ns. glitchcatcher provides the greatest benefit when the output voltage is less than 2v, and in applications using minimum output capacitance. current sense and overload current limiting the current-sense circuit resets the main pwm latchand turns off the high-side mosfet switch whenever the voltage difference between csh and csl from cur- rent through the sense resistor (r1) exceeds the peak current limit (100mv typical). current-mode control provides cycle-by-cycle current- limit capability for maximum overload protection. during normal operation, the peak current limit set by the current-sense resistor determines the maximum output current. when the output is shorted, the peak current may be higher than the set current limit due to delays in the current-sense comparator. thus, foldback current limiting is employed where the set current-limit point is reduced from 100mv to 38mv as the output (feedback) voltage falls (figure 4). when the short-cir- cuit condition is removed, the feedback voltage will rise and the current-limit voltage will revert to 100mv. the foldback current-limit circuit is designed to ensure startup into a resistive load. c3 c1 l1 d2 v in = 5v v dd n1 r4 dh level translator control and drive logic n2 r3 pgnd r3 and r4are optional lxdl bst max1638 figure 3. boost supply for gate drivers downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power ___________________________________________________ ___________________________________ 11 high-side current sensing the common-mode input range of the current-senseinputs (csh and csl) extends to v cc , so it is possible to configure the circuit with the current-sense resistoron the input side rather than on the load side (figure 5). this configuration improves efficiency by reducing the power dissipation in the sense resistor according to the duty ratio. in the high-side configuration, if the output is shorted directly to gnd through a low-resistance path, the cur- rent-sense comparator may be unable to enforce a cur- rent limit. under such conditions, circuit parasitics such as mosfet r ds(on) typically limit the short-circuit cur- rent to a value around the peak-current-limit setting.attach a lowpass-filter network between the current- sense pins and resistor to reduce high-frequency com- mon-mode noise. the filter should be designed with a time constant of around one-fifth of the on-time (130ns at 600khz, for example). resistors in the 20 to 100 range are recommended for r7 and r8. connect thefilter capacitors c11 and c12 from v cc to csh and csl, respectively.values of 39 and 3.3nf are suitable for many designs. place the current-sense filter network close to the ic,within 0.1 in (2.5mm) of the csh and csl pins. overvoltage protection when the output exceeds the set voltage, the synchro-nous rectifier (n2) is driven high (and n1 is driven low). this causes the inductor to quickly dissipate any stored energy and force the fault current to flow to ground. current is limited by the source impedance and para-sitic resistance of the current path, so a fuse is required in series with the +5v input to protect against low- impedance faults, such as a shorted high-side mos- fet. otherwise, the low-side mosfet will eventually fail. dl will go low if the input voltage drops below the undervoltage lockout point. internal soft-start soft-start allows a gradual increase of the internal cur- rent limit at start-up to reduce input surge currents. an internal dac raises the current-limit threshold from 0v to 100mv in four steps (25mv, 50mv, 75mv, and 100mv) over the span of 1536 oscillator cycles. __________________design procedure setting the output voltage select the output voltage using the d0?4 pins. themax1638 uses an internal 5-bit dac as a feedback- resistor voltage divider. the output voltage can be digi- tally set from 1.3v to 3.5v using the d0?4 inputs (table 2). d0?4 are logic inputs and accept both ttl and cmos voltage levels. the max1638 has both fb and agnd inputs, allowing a kelvin connection for remote voltage and ground sensing to eliminate the effects of trace resistance on the feedback voltage. (see pc board layout considerations for further details.) fb input current is 0.1? (max). the max1638 dac codes (d0?4) were designed for compatibility with the intel vrm 8.2 specification for output voltages between 1.8v (code 00101) and 3.5v (code 10000). codes 00110 to 01111 have also been designed for 50mv increments, allowing set voltages down to 1.300v. code 11111 turns off the buck controller, placing the ic in a shutdown mode (0.2ma typical). choosing the error-amplifier gain set the error-amplifier gain to match the voltage-preci-sion requirements of the cpu used. the max1638? loop-gain control input (lg) allows trade-offs in dc/ac voltage accuracy versus output filter capacitor require- ments. ac load regulation can be set to 0.5%, 1%, or 2% by connecting lg as shown in table 3. dc load regulation is typically 10 times better than ac load regulation, and is determined by the gain set by the lg pin. 0 2010 5040 30 60 70 100 9080 20 30 10 0 405060708090100 v fb (%) i lim (%) figure 4. foldback current limit downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power 12 _________________________________________________ _____________________________________ n1 r1 n2 c2 d1 (optional) r9 (optional) r10 (optional) r8 39 c123.3nf c113.3nf v cc v dd csh pwrok csl bst dh lx dl pgnd fb pdrv ndrv agnd ref cc1 cc2 cc2 cc1 rc1 to agnd c6, 1.0 f ceramic no connection r5 100k c9 0.1 f c7 10 f r6 10 to v dd freq d0d1 d2 d3 d4 lg ref c5 0.1 f c8 4.7 f d2cmpsh-3 c40.1 f l1 v in = 5v c1 r7 39 localbypassing max1638 p1 r11 v out = 1.3v to 3.5v n3 load figure 5. buck regulator with high-side current sensing downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power ___________________________________________________ ___________________________________ 13 specifying the inductor three key inductor parameters must be specified:inductance value (l), peak current (i peak ), and dc resistance (r dc ). the following equation includes a constant lir, which is the ratio of inductor peak-to-peak ac current to dc load current. typically lir can be between 0.1 to 0.5. a higher lir value allows forsmaller inductors and better transient response, but results in higher losses and output ripple. a good com- promise between size and loss is a 30% ripple current to load current ratio (lir = 0.30), which corresponds to a peak inductor current 1.15 times higher than the dc load current. where f is the switching frequency, between 300khz and1mhz; i out is the maximum dc load current; and lir is the ratio of ac to dc inductor current (typically 0.3). theexact inductor value is not critical and can be adjusted to make trade-offs among size, transient response, cost, and efficiency. although lower inductor values minimize size and cost, they also reduce efficiency due to higher peak currents. in general, higher inductor values increase efficiency, but at some point resistive losses due to extra turns of wire exceed the benefit gained from lower ac current levels. load-transient response can be adversely affected by high inductor values, especially at low (v in - v out ) differentials. the peak inductor current at full load is 1.15 x i out if the previous equation is used; otherwise, the peak currentcan be calculated using the following equation: the inductor? dc resistance is a key parameter for effi- cient performance, and should be less than the current- sense resistor value. calculating the current-sense resistor value calculate the current-sense resistor value according tothe worst-case minimum current-limit threshold voltage (from the electrical characteristics ) and the peak inductor current required to service the maximum load. ii vv v fx l x v peak out out in max out osc in max () () =+ () 2 l vv v v x f x i x lir out in max out in max osc out () () = () table 2. output voltage adjustment settings d3 0 d1 0 d2 0 d0 0 output voltage (v) 2.050 compatibility 0 0 d4 0 1 2.000 0 0 1 0 0 1.950 0 1 0 1 1.900 0 0 0 0 0 1 0 1.850 0 0 1 1 1.800 intel-compatibledac codes 0 0 1 1 0 1.750 0 1 1 1 1.700 0 0 0 1 0 0 0 1.650 1 0 0 1 1.600 0 1 1 0 0 1.550 1 1 0 1 1.500 0 0 0 1 0 1 0 1.450 1 0 1 1 1.400 0 1 1 1 0 1.350 1 1 1 1 1.300 continuation of50mv increment to 1.3v 0 0 0 0 0 0 0 3.500 0 0 0 1 3.400 1 0 1 0 0 3.300 0 1 0 1 3.200 1 1 1 0 0 1 0 3.100 0 0 1 1 3.000 1 0 1 1 0 2.900 0 1 1 1 2.800 1 1 1 1 0 0 0 2.700 1 0 0 1 2.600 1 1 1 0 0 2.500 1 1 0 1 2.400 1 1 1 1 0 1 0 2.300 1 0 1 1 2.200 1 1 1 1 0 2.100 intel-compatibledac codes 1 1 1 1 n/a shutdown 1 1 1 ac load- regulation error (%) 1 lg connected to: dc load- regulation error (%) ref 0.1 gnd 0.05 v cc 0.2 0.5 2 typical a e (v gain / i gain ) 8 2 4 table 3. lg pin adjustment settings downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power 14 _________________________________________________ _____________________________________ use i peak from the equation in the section specifying the inductor . the high inductance of standard wire-wound resistorscan degrade performance. low-inductance resistors, such as surface-mount power metal-strip resistors, are preferred. the current-sense resistor? power rating should be higher than the following: in high-current applications, connect several resistors in parallel as necessary to obtain the desired resis- tance and power rating. selecting the output filter capacitor output filter capacitor values are generally determinedby effective series resistance (esr) and voltage- rating requirements, rather than by the actual capaci- tance value required for loop stability. due to the high switching currents and demanding regulation require- ments in a typical max1638 application, use only spe- cialized low-esr capacitors intended for switching- regulator applications, such as kemet t510, avx tps, sprague 595d, sanyo os-con, or sanyo gx series. do not use standard aluminum-electrolytic capacitors, which can cause high output ripple and instability due to high esr. the output voltage ripple is usually domi- nated by the filter capacitor? esr, and can be approxi mated as i ripple x r esr . to ensure stability, the capacitor must meet both minimum capacitance and maximum esr values as given in the following equations: compensating the feedback loop the feedback loop needs proper compensation to pre-vent excessive output ripple and poor efficiency caused by instability. compensation cancels unwanted poles and zeros in the dc-dc converter? transfer func- tion that are due to the power-switching and filter ele- ments with corresponding zeros and poles in the feedback network. these compensation zeros and poles are set by the compensation components cc1, cc2, and rc1. the objective of compensation is toensure stability by ensuring that the dc-dc converter? phase shift is less than 180 by a safe margin, at the frequency where the loop gain falls below unity. canceling the sampling pole and output filter esr zero compensate the fast-voltage feedback loop by con- necting a resistor and a capacitor in series from the cc1 pin to agnd. the pole from cc1 can be set to cancel the zero from the filter-capacitor esr. thus the capacitor at cc1 should be as follows: resistor rc1 sets a zero that can be used to compen- sate for the sampling pole generated by the switching frequency. set rc1 to the following: the cc1 pin? output resistance is 10k . setting the dominant pole and canceling the load and output filter pole compensate the slow-voltage feedback loop by addinga ceramic capacitor from the cc2 pin to agnd. this is an integrator loop used to cancel out the dc load- regulation error. selection of capacitor cc2 sets the dominant pole and a compensation zero. the zero is typically used to cancel the unwanted pole generated by the load and output filter capacitor at the maximum load current. select cc2 to place the zero close to or slightly lower than the frequency of the unwanted pole, as follows: the transconductance of the integrator amplifier at cc2 is 1mmho. the voltage swing at cc2 is internally clamped around 2.4v to 3v minimum and 4v to v cc maximum to improve transient response times. cc2can source and sink up to 100?. choosing the mosfet switches the two high-current n-channel mosfets must belogic-level types with guaranteed on-resistance specifi- cations at v gs = 4.5v. lower gate-threshold specs are better (i.e., 2v max rather than 3v max). gate charge cc mmho x c x v i out out out max 2 1 4 () = rc v v fx c c out in osc 1 1 21 = + ? ? ? ? ? ? cc cx r k out esr 1 10 = c v v v vx r x f rr out ref out in min out sense osc esr sense () > + ? ? ? ? ? ? < 1 p mv r sense sense () 115 2 r mv i sense peak = 85 downloaded from: http:///
max1638 high-speed step-down controller with synchronous rectification for cpu power ___________________________________________________ ___________________________________ 15 should be less than 200nc to minimize switching lossesand reduce power dissipation. i 2 r losses are the greatest heat contributor to mosfet power dissipation and are distributed between thehigh- and low-side mosfets according to duty factor, as follows: gate-charge losses are dissipated in the ic, and do not heat the mosfets. ensure that both mosfets are at a safe junction temperature by calculating the temperature rise according to package thermal-resistance specifica- tions. the high-side mosfet? worst-case dissipation occurs at the maximum output voltage and minimum input voltage. for the low-side mosfet, the worst case is at the maximum input voltage when the output is short- circuited (consider the duty factor to be 100%). calculating ic power dissipation power dissipation in the ic is dominated by averagegate-charge current into both mosfets. average cur- rent is approximately: i dd = (q g1 + q g2 ) x f osc where i dd is the drive current, q g is the total gate charge for each mosfet, and f osc is the switching frequency.power dissipation of the ic is: p d = i cc x v cc + i dd x v dd where i cc is the quiescent supply current of the ic. junction temperature for the ic is primarily a function ofthe pc board layout, since most of the heat is removed through the traces connected to the pins and the ground and power planes. a 24-pin ssop on a typical four-layer board with ground and power planes show equivalent thermal impedance of about 60?/w. junction temperature of the die is approximately: t j = p d x ja + t a where t a is the ambient temperature and ja is the equivalent junction-to-ambient thermal impedance. selecting the rectifier diode the rectifier diode d1 is a clamp that catches the nega- tive inductor swing during the 30ns typical dead time between turning off the high-side mosfet and turning on the low-side mosfet synchronous rectifier. d1 must be a schottky diode, to prevent the mosfet body diode from conducting. it is acceptable to omit d1 and let the bodydiode clamp the negative inductor swing, but efficiency will drop about 1%. use a 1n5819 diode for loads up to 3a, or a 1n5822 for loads up to 10a. adding the bst supply diode and capacitor a signal diode, such as a 1n4148, works well for d2 inmost applications, although a low-leakage schottky diode provides slightly improved efficiency. do not use large power diodes, such as the 1n4001 or 1n5817. exercise caution in the selection of schottky diodes, since some types exhibit high reverse leakage at high operating tem- peratures. bypass bst to lx using a 0.1? capacitor. selecting the input capacitors place a 0.1? ceramic capacitor and 10? capacitor between v cc and agnd, as well as between v dd and pgnd, within 0.2 in. (5mm) of the v cc and v dd pins. select low-esr input filter capacitors with a ripple-current rating exceeding the rms input ripple current, connecting several capacitors in parallel if necessary. rms input ripple current is determined by the input voltage and load current, with the worst-possible case occurring at v in = 2 x v out : choosing the glitchcatcher mosfets p-channel and n-channel switches and a series resistorare required for the current-boost circuit (figure 6). current through the mosfets and current-limiting resistors must be sufficient to supply the load current, with enough extra for prompt output regulation without excessive overshoot. design for boost-current values 1.5 times the maximum load current, and choose mosfets and current-limiting resistors such that: gate resistors may be required to slow the transition edges. rr vv i andrr v i dson p max limit in out out max dson n max limit out out max ,( ) () ,( ) () . . + + 15 15 ii vvv v i i when v v rms load max out in out in rms out in out ( ) / () = == 22 p low side i x r x v v d load ds on out in ( ) () = ? ? ? ? ? ? 2 1 p high side i x r x v v d load ds on out in ( ) () = 2 downloaded from: http:///
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. max1638 high-speed step-down controller with synchronous rectification for cpu power __________applications information efficiency considerations refer to the max796?ax799 data sheet for informa- tion on calculating losses and improving efficiency. pc board layout considerations good pc board layout and routing are required in high- current, high-frequency switching power supplies toachieve good regulation, high efficiency, and stability. the pc board layout artist must be provided with explicit instructions concerning the placement of power-switching components and high-current routing. it is strongly recommended that the evaluation kit pc board layouts be followed as closely as possible. contact maxim? applications department concerning the availability of pc board examples for higher-current circuits. in most applications, the circuit is on a multilayer board, and full use of the four or more copper layers is recommended. use the top layer for high-current power and ground connections. leave the extra cop- per on the board as a pseudo-ground plane. use the bottom layer for quiet connections (ref, fb, agnd), and the inner layers for an uninterrupted ground plane. a ground plane and pseudo-ground plane are essential for reducing ground bounce and switching noise. place the high-power components (c1, r1, n1, d1, n2, l1, and c2 in figure 1) as close together as possible. minimize ground-trace lengths in high-current paths. the surface-mount power components should bebutted up to one another with their ground terminals almost touching. connect their ground terminals using a wide, filled zone of top-layer copper (the pseudo- ground plane), rather than through the internal ground plane. at the output terminal, use vias to connect the top-layer pseudo-ground plane to the normal inner- layer ground plane at the output filter capacitor ground terminals. this minimizes interference from ir drops and ground noise, and ensures that the ic? agnd is sensing at the supply? output terminals. minimize high-current path trace lengths. use very short and wide traces. from c1 to n1: 0.4 in. (10mm)max length; d1 anode to n2: 0.2 in. (5mm) max length; lx node (n1 source, n2 drain, d1 cathode, inductor l1): 0.6 in. (15mm) max length. ___________________chip information 2423 22 21 20 19 18 17 12 3 4 5 6 7 8 dhlx pgnd dl csh csl pwrok bst top view v dd pdrvndrv d3 lg d0 d1 d2 1615 14 13 9 1011 12 d4freq cc2 cc1 fb agnd ref v cc ssop/qsop max1638 a "+" sign will replace the first pin indicator on lead-free packages. transistor count: 3135substrate connected to agnd r2 (optional) (optional) (optional) input 5v c2 c8 output1.3v to 3.5v n3 ndrv pdrv load max1638 p1 figure 6. glitchcatcher circuit __________________pin configuration downloaded from: http:///

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